Job Overview
The Systems Media IP group is responsible for the development of Image Signal Processors (ISPs), Display Processors, and Video codecs for deploying within Arm Compute Subsystems for various end markets, including automotive, IoT, and client market segments. Our intellectual property encompasses RTL, reference drivers, tools, and libraries, enabling our customers to build upon our work to create innovative products! We are currently looking for creative and enthusiastic design engineers to be part of a diverse team that constantly pushes the boundaries of power, performance, and area across our multimedia IP portfolio, while also generating designs that are robust, maintainable, and deliverable to the extraordinary quality our customers expect. This is a new team with plenty of opportunities to shape its future, and your own growth and career progression. Responsibilities:
Ownership of unit level development or multiple unit hierarchy or technical lead of an overall IP. Design and test new hardware modules to implement innovative imaging algorithms and/or video codecs. Engage in all aspect of hardware design including architectural investigations and modeling, specifications, design and simulation, backend implementation support and IP maintenance. Identify cross Media IP process or methodology improvement opportunities, implementing changes to advance the hardware design efficiency. Collaborate closely with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team. Required Skills and Experience:
Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. Knowledge of advanced image processing algorithms, such as local tone mapping, noise reduction, motion estimation, transform coding etc or AI/ML based computer vision algorithms. Experience of designing to meet industry standard protocols (e.g. AMBA interfaces, DDR specifications). Experience of Functional Safety product development for the Automotive market (applying standards such as ISO 26262 and/or IEC 61508). Programming language, such as MATLAB, 'C' or C++. Experience with SystemVerilog Assertions (SVA) and Continuous Integration flows. In Return: You will get to utilise your engineering skills to build multimedia technologies and influence millions of devices for years to come. You will be able to drive and bring your ideas to a wider audience, while building your technical leadership and influencing skills.
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The Systems Media IP group is responsible for the development of Image Signal Processors (ISPs), Display Processors, and Video codecs for deploying within Arm Compute Subsystems for various end markets, including automotive, IoT, and client market segments. Our intellectual property encompasses RTL, reference drivers, tools, and libraries, enabling our customers to build upon our work to create innovative products! We are currently looking for creative and enthusiastic design engineers to be part of a diverse team that constantly pushes the boundaries of power, performance, and area across our multimedia IP portfolio, while also generating designs that are robust, maintainable, and deliverable to the extraordinary quality our customers expect. This is a new team with plenty of opportunities to shape its future, and your own growth and career progression. Responsibilities:
Ownership of unit level development or multiple unit hierarchy or technical lead of an overall IP. Design and test new hardware modules to implement innovative imaging algorithms and/or video codecs. Engage in all aspect of hardware design including architectural investigations and modeling, specifications, design and simulation, backend implementation support and IP maintenance. Identify cross Media IP process or methodology improvement opportunities, implementing changes to advance the hardware design efficiency. Collaborate closely with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team. Required Skills and Experience:
Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. Knowledge of advanced image processing algorithms, such as local tone mapping, noise reduction, motion estimation, transform coding etc or AI/ML based computer vision algorithms. Experience of designing to meet industry standard protocols (e.g. AMBA interfaces, DDR specifications). Experience of Functional Safety product development for the Automotive market (applying standards such as ISO 26262 and/or IEC 61508). Programming language, such as MATLAB, 'C' or C++. Experience with SystemVerilog Assertions (SVA) and Continuous Integration flows. In Return: You will get to utilise your engineering skills to build multimedia technologies and influence millions of devices for years to come. You will be able to drive and bring your ideas to a wider audience, while building your technical leadership and influencing skills.
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