Principal Engineer, Design Verification Engineering
Location:
Spain, Valencia, Cortes Valencianas Time Type:
Full time Posted On:
Posted Yesterday Job Requisition ID:
R243243 About ADI: Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY23 and approximately 26,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at
www.analog.com . Position:
Principal Engineer - Verification Engineer Business Unit:
Consumer (CON) - Duncan Bosworth Group:
Custom Silicon & Integration (CSI) - Brendan Odowd Hiring Manager:
José Ibáñez (+34 3389752, jose.ibanez@analog.com) Responsibilities: Verification of complex mixed signal designs and sub-systems. Good understanding of Mixed-Signal Industry Design Flow and Top-Down development methodology. Independent interpretation of analog circuit schematics. Analog Behavioral Models (SystemVerilog, Verilog-AMS, Wreal, UDNs, EEnet). Validation of real number models vs SPICE models. Experience with SPICE simulations using industry simulators such as SPECTRE. Define test plans, tests, and verification methodology for block/chip-level verification of Mixed Signal Designs. Work with the design team in generating test-plans and closure of test and functional coverage. Continuous interaction with analog co-sim team in enabling top-level chip verification aspects. Contribute and influence the decisions on methodologies to be adopted for the verification. Technically mentor and guide junior verification engineers on SoC Verification. Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team. Hands-On UVM at user level, pseudo and constrained random techniques, assertion-based verification techniques with System Verilog. Minimum Qualifications & Experience: Bachelor’s or master’s degree in Engineering (Electronic Engineering) or equivalent. Excellent debugging and analytical skills. 10-15 years in ASIC design verification. Additional Qualifications & Experience: Verification Planning tools (ePlanner, vManager). Property Specification Language (PSL), SystemVerilog Assertions (SVA). Proficient with Cadence Suite (Virtuoso IUS). Scripting languages (Shell, TCL, PERL, Python) for bench automation. Debugging of Gate Level Simulation (GLS), waiving Timing Violations approved by designer. Coding up in C tests on M3 Series Cortex based products. Building and leading small verification teams. Strong interpersonal, teamwork and communication skills are required. Why You Will Like Working At ADI: We place great value on individual judgment. We allow our employees the freedom to explore new ideas and the autonomy to determine how to best achieve business goals and objectives. We emphasize professional development and mentoring. Above all, we recognize that the personal goals of our employees and the company’s goals are closely related and must support each other. Pay Rate Type:
Salary Relocation Assistance Offered:
Yes Visa Sponsorship Offered:
Yes Travel:
Yes,
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
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Location:
Spain, Valencia, Cortes Valencianas Time Type:
Full time Posted On:
Posted Yesterday Job Requisition ID:
R243243 About ADI: Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY23 and approximately 26,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at
www.analog.com . Position:
Principal Engineer - Verification Engineer Business Unit:
Consumer (CON) - Duncan Bosworth Group:
Custom Silicon & Integration (CSI) - Brendan Odowd Hiring Manager:
José Ibáñez (+34 3389752, jose.ibanez@analog.com) Responsibilities: Verification of complex mixed signal designs and sub-systems. Good understanding of Mixed-Signal Industry Design Flow and Top-Down development methodology. Independent interpretation of analog circuit schematics. Analog Behavioral Models (SystemVerilog, Verilog-AMS, Wreal, UDNs, EEnet). Validation of real number models vs SPICE models. Experience with SPICE simulations using industry simulators such as SPECTRE. Define test plans, tests, and verification methodology for block/chip-level verification of Mixed Signal Designs. Work with the design team in generating test-plans and closure of test and functional coverage. Continuous interaction with analog co-sim team in enabling top-level chip verification aspects. Contribute and influence the decisions on methodologies to be adopted for the verification. Technically mentor and guide junior verification engineers on SoC Verification. Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team. Hands-On UVM at user level, pseudo and constrained random techniques, assertion-based verification techniques with System Verilog. Minimum Qualifications & Experience: Bachelor’s or master’s degree in Engineering (Electronic Engineering) or equivalent. Excellent debugging and analytical skills. 10-15 years in ASIC design verification. Additional Qualifications & Experience: Verification Planning tools (ePlanner, vManager). Property Specification Language (PSL), SystemVerilog Assertions (SVA). Proficient with Cadence Suite (Virtuoso IUS). Scripting languages (Shell, TCL, PERL, Python) for bench automation. Debugging of Gate Level Simulation (GLS), waiving Timing Violations approved by designer. Coding up in C tests on M3 Series Cortex based products. Building and leading small verification teams. Strong interpersonal, teamwork and communication skills are required. Why You Will Like Working At ADI: We place great value on individual judgment. We allow our employees the freedom to explore new ideas and the autonomy to determine how to best achieve business goals and objectives. We emphasize professional development and mentoring. Above all, we recognize that the personal goals of our employees and the company’s goals are closely related and must support each other. Pay Rate Type:
Salary Relocation Assistance Offered:
Yes Visa Sponsorship Offered:
Yes Travel:
Yes,
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
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