We are seeking talented Socket2Socket Verification Engineers and Leads to join our team. Candidates should possess strong expertise in socket-to-socket verification processes, particularly with AXI, Chip2Chip Multilink (CML), and CHI protocols. Engineers will focus on test development and debugging, while Leads will oversee the verification process, manage teams, and ensure successful project sign-off. Both roles will contribute to high-quality verification of our cutting-edge technologies. Key Responsibilities (Engineer)
Develop test benches and detailed test plans for Socket2Socket verification. Utilize System Verilog and UVM to create, simulate, and debug test cases. Perform coverage analysis to ensure thorough verification of designs. Collaborate with design and cross-functional teams to troubleshoot and resolve issues. Key Responsibilities (Lead)
Lead the verification process for Socket2Socket projects, ensuring timely and high-quality deliverables. Mentor and guide a team of verification engineers, fostering professional development and ensuring adherence to best practices. Define and manage test strategies, simulation plans, and coverage analysis to achieve comprehensive verification. Act as the primary decision-maker for verification sign-off, collaborating closely with management and design teams. Key Skills
Expertise in System Verilog, UVM, and coverage-driven verification methodologies. Strong experience in test planning, test bench development, simulation, and debugging. For Lead: Proven leadership, team management, and decision-making capabilities. Domain Knowledge
In-depth understanding of AXI, Chip2Chip Multilink (CML), and CHI protocols. Qualifications
For Engineer: 5+ years of experience in socket-to-socket verification and hardware validation. For Lead: 10+ years of experience in socket-to-socket verification, with a demonstrated ability to lead teams and manage complex projects. Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
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