Lead Verification Engineer

Lead Verification Engineer focuses on leading verification engineer in cambridge.

What the role involves

• Leading Verification Engineer in Cambridge.
• Supporting and improving test infrastructure and CI flows.
• Collaborating closely with global partners to support successful silicon tapeouts.

Skills and requirements

• 5+ years’ experience in design verification (CPU and/or GPU ideally).
• Strong hands-on experience with SystemVerilog and UVM.
• Full lifecycle experience through to tapeout.
• Strong coding skills in C and/or Python for automation.

Candidate fit

• technical judgement, safe working habits, careful diagnostics, and practical problem-solving

Additional role context

• The work is focused on production-grade open-source silicon , including the Ibex RISC-V CPU and Open.
• Titan security platform , developed in collaboration with world-leading partners such as Google.
• This is real silicon used as a foundation for secure and scalable compute systems.