Principal Design Engineer

This Principal Design Engineer opportunity is built around own micro-architecture definition from high-level specifications. It would suit someone who can bring careful technical judgement and practical problem-solving to the role.

Known job details

• Pay: £100,000 - £135,000
• Work model: Hybrid
• £100,000 – £135,000 base salary.
• 30% Bonus (company performance related).
• Total Compensation (£135,000 - £175,500).
• Relocation support available.

Likely focus of the role

• Own micro-architecture definition from high-level specifications.
• Develop high-quality SystemVerilog RTL aligned to performance, power, and area targets.
• Work closely with verification teams to ensure design-for-verification efficiency.

Requirements mentioned

• Principal Design Engineer – Essential Skills.
• Strong experience in SystemVerilog RTL design.
• ~15+ years’ experience within digital design (SoC.