Welcome to Codasip
We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.
Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.
Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athens. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.
Codasip is a private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.
About our UK Design Centres
Our UK design centres in Cambridge and Bristol were set up in early 2022 to develop high performance, low power embedded and application CPU cores from scratch. We are embarking on clean-sheet designs, and need people who can establish high quality working practices as they explore new ground under the guidance of
Kalvin Williams,
the Senior CPU Design Manager. These projects are highly complex, with usually one person being responsible for owning a portion of the design. YOUR ROLE: We’re looking for Senior Hardware Engineers to join us either in our Cambridge or Bristol office. You’ll interact and collaborate with other engineers from a range of disciplines across Europe as part of an international team to find solutions. We hire really bright, highly motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be met Working closely with the verification team on verification planning, debugging and final sign-off Technical specification and documentation writing Participate in design and verification reviews Be responsible for defining, estimating and tracking of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning tools (Git, SVN) Knowledge of scripting languages (Shell, Bash, Python) Analytical thinking, self-sufficiency, team collaboration Ability to work across teams to debug issues and find root causes NICE-TO-HAVE: Knowledge of RISC-V instruction set Advanced knowledge of computer systems and architecture Experience of Synthesis, Design for Test and Timing Analysis Experience of low power design techniques Experience of Formal verification techniques Knowledge of C/C++ What’s in it for you? Joining Codasip’s founding UK team is a chance to challenge yourself to work on complicated projects and structure how we do design. The best candidates for us are decisive, proactive, comfortable with ambiguity, opinionated yet collaborative and passionate about continuous improvement as we scale up and disrupt the semiconductor industry. Please note this position can be based in either our Cambridge or Bristol offices. It is a hybrid role where you will be expected to be in the office a few days per week, with flexible work from home options available. Want to be an architect of ambition? Join Codasip At Codasip we are committed to fostering a creative and collaborative work environment.
Codasippers
have the freedom to explore original ideas and experiment with new techniques. We believe in the benefits of cross-departmental collaboration and encourage sharing to build awareness throughout the teams. This enables you to add value through variety in your work. When you join Codasip, you become part of a motivated team of self-starters where your ideas are appreciated and your voice is heard. We strive to create an environment where your ambition can flourish and your career can reach new heights. So, come and join our team of architects of ambition. We can't wait to see what you'll achieve at Codasip.
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Kalvin Williams,
the Senior CPU Design Manager. These projects are highly complex, with usually one person being responsible for owning a portion of the design. YOUR ROLE: We’re looking for Senior Hardware Engineers to join us either in our Cambridge or Bristol office. You’ll interact and collaborate with other engineers from a range of disciplines across Europe as part of an international team to find solutions. We hire really bright, highly motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be met Working closely with the verification team on verification planning, debugging and final sign-off Technical specification and documentation writing Participate in design and verification reviews Be responsible for defining, estimating and tracking of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning tools (Git, SVN) Knowledge of scripting languages (Shell, Bash, Python) Analytical thinking, self-sufficiency, team collaboration Ability to work across teams to debug issues and find root causes NICE-TO-HAVE: Knowledge of RISC-V instruction set Advanced knowledge of computer systems and architecture Experience of Synthesis, Design for Test and Timing Analysis Experience of low power design techniques Experience of Formal verification techniques Knowledge of C/C++ What’s in it for you? Joining Codasip’s founding UK team is a chance to challenge yourself to work on complicated projects and structure how we do design. The best candidates for us are decisive, proactive, comfortable with ambiguity, opinionated yet collaborative and passionate about continuous improvement as we scale up and disrupt the semiconductor industry. Please note this position can be based in either our Cambridge or Bristol offices. It is a hybrid role where you will be expected to be in the office a few days per week, with flexible work from home options available. Want to be an architect of ambition? Join Codasip At Codasip we are committed to fostering a creative and collaborative work environment.
Codasippers
have the freedom to explore original ideas and experiment with new techniques. We believe in the benefits of cross-departmental collaboration and encourage sharing to build awareness throughout the teams. This enables you to add value through variety in your work. When you join Codasip, you become part of a motivated team of self-starters where your ideas are appreciated and your voice is heard. We strive to create an environment where your ambition can flourish and your career can reach new heights. So, come and join our team of architects of ambition. We can't wait to see what you'll achieve at Codasip.
#J-18808-Ljbffr
