STA Synthesis Engineer

STA Synthesis Engineer focuses on high performance and value added services that enable samsung electronics deliver world-class products.role and responsibilities.

What the role involves

• High performance and value added services that enable Samsung Electronics deliver world-class products.Role and Responsibilities.
• · Complete ownership of timing constraint at image sensor full chip and sub system levels.
• O Timing constraint (Hierarchical, Flat) development and release for Synthesis/PD work.
• O Incremental update of constraint as and when it is required.
• · RTL PPA analysis (physical and power aware) at sub system levels for power, performance, area trade-off.
• · Development of necessary scripts in TCL, Perl and/or Python for efficiency improvement.

Skills and requirements

• Process variation, timing ECO generation etc.
• · Strong understanding in STA fundamentals, AOCV/POCV, signal integrity, cross-talk noise.
• · Hands-on experience in pre and post layout timing analysis (both flat and hierarchical) and debug.
• · Experience in both physical and UPF aware synthesis using Industry standard EDA tools.

Candidate fit

• technical judgement, safe working habits, careful diagnostics, and practical problem-solving